uint64_t tn_cmp, cur_tick, diff;
unsigned int irq;
unsigned int oneshot;
+ s_time_t diff_ns, period_ns = 0;
ASSERT(tn < HPET_TIMER_NUM);
ASSERT(rw_is_write_locked(&h->lock));
* status register) before another interrupt can be delivered.
*/
oneshot = !timer_is_periodic(h, tn) || timer_level(h, tn);
+ diff_ns = hpet_tick_to_ns(h, diff);
+ if ( !oneshot )
+ period_ns = hpet_tick_to_ns(h, h->hpet.period[tn]);
+
TRACE_2_LONG_4D(TRC_HVM_EMUL_HPET_START_TIMER, tn, irq,
- TRC_PAR_LONG(hpet_tick_to_ns(h, diff)),
- TRC_PAR_LONG(oneshot ? 0LL :
- hpet_tick_to_ns(h, h->hpet.period[tn])));
- create_periodic_time(vhpet_vcpu(h), &h->pt[tn],
- hpet_tick_to_ns(h, diff),
- oneshot ? 0 : hpet_tick_to_ns(h, h->hpet.period[tn]),
+ TRC_PAR_LONG(diff_ns), TRC_PAR_LONG(period_ns));
+
+ create_periodic_time(vhpet_vcpu(h), &h->pt[tn], diff_ns, period_ns,
irq, timer_level(h, tn) ? hpet_timer_fired : NULL,
timer_level(h, tn) ? (void *)(unsigned long)tn : NULL,
timer_level(h, tn));
int vlapic_accept_pic_intr(struct vcpu *v)
{
+ bool target, accept = false;
+
if ( vlapic_hw_disabled(vcpu_vlapic(v)) || !has_vpic(v->domain) )
return 0;
- TRACE_2D(TRC_HVM_EMUL_LAPIC_PIC_INTR,
- (v == v->domain->arch.hvm.i8259_target),
- v ? __vlapic_accept_pic_intr(v) : -1);
+ target = v == v->domain->arch.hvm.i8259_target;
+ if ( target )
+ accept = __vlapic_accept_pic_intr(v);
+
+ TRACE_2D(TRC_HVM_EMUL_LAPIC_PIC_INTR, target, accept);
- return ((v == v->domain->arch.hvm.i8259_target) &&
- __vlapic_accept_pic_intr(v));
+ return target && accept;
}
void vlapic_adjust_i8259_target(struct domain *d)
{
unsigned long tmict;
uint64_t period, tdt_msr;
+ bool is_periodic;
s->pt.irq = vlapic_get_reg(s, APIC_LVTT) & APIC_VECTOR_MASK;
period = ((uint64_t)APIC_BUS_CYCLE_NS *
(uint32_t)tmict * s->hw.timer_divisor);
+ is_periodic = vlapic_lvtt_period(s);
+
TRACE_2_LONG_3D(TRC_HVM_EMUL_LAPIC_START_TIMER, TRC_PAR_LONG(period),
- TRC_PAR_LONG(vlapic_lvtt_period(s) ? period : 0LL), s->pt.irq);
+ TRC_PAR_LONG(is_periodic ? period : 0LL), s->pt.irq);
+
create_periodic_time(vlapic_vcpu(s), &s->pt, period,
- vlapic_lvtt_period(s) ? period : 0,
+ is_periodic ? period : 0,
s->pt.irq,
- vlapic_lvtt_period(s) ? vlapic_pt_cb : NULL,
+ is_periodic ? vlapic_pt_cb : NULL,
&s->timer_last_update, false);
s->timer_last_update = s->pt.last_plt_gtime;
}
int vpic_ack_pending_irq(struct vcpu *v)
{
- int irq;
+ int irq, accept;
struct hvm_hw_vpic *vpic = &v->domain->arch.hvm.vpic[0];
ASSERT(has_vpic(v->domain));
- TRACE_2D(TRC_HVM_EMUL_PIC_PEND_IRQ_CALL, vlapic_accept_pic_intr(v),
- vpic->int_output);
- if ( !vlapic_accept_pic_intr(v) || !vpic->int_output )
+ accept = vlapic_accept_pic_intr(v);
+
+ TRACE_2D(TRC_HVM_EMUL_PIC_PEND_IRQ_CALL, accept, vpic->int_output);
+ if ( !accept || !vpic->int_output )
return -1;
irq = vpic_intack(vpic);